The VIA Padlock Security Engine provides crypto acceleration on some VIA chipsets. It is one of the earliest examples of security functions for a commodity processor. The on-die security engine provides access to a random number generator, AES in ECB, CBC and OFB modes, SHA1 and SHA2 acceleration, and a Montgomery multiplier. AES and the RNG were available in VIA processor Eden models from 2003, while Esther added SHA and Montgomery Multiplier in 2006.
VIA provides an SDK to interface with the processor and its features. The SDK provides C/C++ example code for using the security services, and provides the ASM to opcodes to interface with the processor. The VIA Padlock Security Engine SDK can be downloaded from VIA's site at x86 Software Engineering Services.
The page VIA C3 page archived in the Wayback Machine should help you find useful documentation, like the Programming Guides and the Cryptographic Research Inc evaluation of the RNG. You can download the documents below via padlock-evaluation.zip and padlock-programming-guides.zip.
The Padlock RNG was added to the library at Commit 7fb5953055d1 for Crypto++ 6.0. The files of interest are padlkrng.h and padlkrng.cpp. The Padlock RNG inherits from RandomNumberGenerator so you can use it like any other generator.
Here's how the generator performs on a 1.8 GHz VIA C7-D with XSTORE divisor=1.
|Algorithm||MiB/Second||Cycles Per Byte|
PadlockSDK_3.1_Release_20090121.zip - VIA Padlock 3.1 SDK. The SDK provides C/C++ example code for using the security services, and provides the ASM to opcodes to interface with the processor.
padlock-evaluation.zip - Cryptographic Research Inc evaluation of the Padlock Engine including the RNG from the VIA C3 page dated February 2004.
padlock-programming-guides.zip - Padlock Programming Guides and Application Notes for the C5 processor from the VIA C3 page dated February 2004.