Crypto++  5.6.3
Free C++ class library of cryptographic schemes
cpu.h
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1 // cpu.h - written and placed in the public domain by Wei Dai
2 
3 //! \file cpu.h
4 //! \brief Functions for CPU features and intrinsics
5 //! \details At the moment, the functions are used heavily in X86/X32/X64 code paths
6 // for SSE, SSE2 and SSE4. The funtions are also used on occassion for AArch32
7 //! and AArch64 code paths for NEON.
8 
9 #ifndef CRYPTOPP_CPU_H
10 #define CRYPTOPP_CPU_H
11 
12 #include "config.h"
13 
14 #if (CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARM64)
15 # if defined(_MSC_VER) || defined(__BORLANDC__)
16 # define CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
17 # else
18 # define CRYPTOPP_GNU_STYLE_INLINE_ASSEMBLY
19 # endif
20 # if CRYPTOPP_BOOL_NEON_INTRINSICS_AVAILABLE
21 # include <arm_neon.h>
22 # endif
23 # if (CRYPTOPP_BOOL_ARM_CRYPTO_INTRINSICS_AVAILABLE || CRYPTOPP_BOOL_ARM_CRC32_INTRINSICS_AVAILABLE)
24 # include <stdint.h>
25 # if (defined(__ARM_ACLE) || defined(__GNUC__)) && !defined(__APPLE__)
26 # include <arm_acle.h>
27 # endif
28 # endif
29 #endif // ARM-32 or ARM-64
30 
31 #ifdef CRYPTOPP_GENERATE_X64_MASM
32 
33 #define CRYPTOPP_X86_ASM_AVAILABLE
34 #define CRYPTOPP_BOOL_X64 1
35 #define CRYPTOPP_BOOL_SSE2_ASM_AVAILABLE 1
36 #define NAMESPACE_END
37 
38 #else
39 
40 # if CRYPTOPP_BOOL_SSE2_INTRINSICS_AVAILABLE
41 # include <emmintrin.h>
42 # endif
43 
44 #if CRYPTOPP_BOOL_AESNI_INTRINSICS_AVAILABLE
45 #if !defined(__GNUC__) || defined(__SSSE3__) || defined(__INTEL_COMPILER)
46 #include <tmmintrin.h>
47 #else
48 NAMESPACE_BEGIN(CryptoPP)
49 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
50 _mm_shuffle_epi8 (__m128i a, __m128i b)
51 {
52  asm ("pshufb %1, %0" : "+x"(a) : "xm"(b));
53  return a;
54 }
55 NAMESPACE_END
56 #endif // tmmintrin.h
57 #if !defined(__GNUC__) || defined(__SSE4_1__) || defined(__INTEL_COMPILER)
58 #include <smmintrin.h>
59 #else
60 NAMESPACE_BEGIN(CryptoPP)
61 __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
62 _mm_extract_epi32 (__m128i a, const int i)
63 {
64  int r;
65  asm ("pextrd %2, %1, %0" : "=rm"(r) : "x"(a), "i"(i));
66  return r;
67 }
68 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
69 _mm_insert_epi32 (__m128i a, int b, const int i)
70 {
71  asm ("pinsrd %2, %1, %0" : "+x"(a) : "rm"(b), "i"(i));
72  return a;
73 }
74 NAMESPACE_END
75 #endif // smmintrin.h
76 #if !defined(__GNUC__) || (defined(__AES__) && defined(__PCLMUL__)) || defined(__INTEL_COMPILER)
77 #include <wmmintrin.h>
78 #else
79 NAMESPACE_BEGIN(CryptoPP)
80 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
81 _mm_clmulepi64_si128 (__m128i a, __m128i b, const int i)
82 {
83  asm ("pclmulqdq %2, %1, %0" : "+x"(a) : "xm"(b), "i"(i));
84  return a;
85 }
86 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
87 _mm_aeskeygenassist_si128 (__m128i a, const int i)
88 {
89  __m128i r;
90  asm ("aeskeygenassist %2, %1, %0" : "=x"(r) : "xm"(a), "i"(i));
91  return r;
92 }
93 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
94 _mm_aesimc_si128 (__m128i a)
95 {
96  __m128i r;
97  asm ("aesimc %1, %0" : "=x"(r) : "xm"(a));
98  return r;
99 }
100 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
101 _mm_aesenc_si128 (__m128i a, __m128i b)
102 {
103  asm ("aesenc %1, %0" : "+x"(a) : "xm"(b));
104  return a;
105 }
106 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
107 _mm_aesenclast_si128 (__m128i a, __m128i b)
108 {
109  asm ("aesenclast %1, %0" : "+x"(a) : "xm"(b));
110  return a;
111 }
112 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
113 _mm_aesdec_si128 (__m128i a, __m128i b)
114 {
115  asm ("aesdec %1, %0" : "+x"(a) : "xm"(b));
116  return a;
117 }
118 __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
119 _mm_aesdeclast_si128 (__m128i a, __m128i b)
120 {
121  asm ("aesdeclast %1, %0" : "+x"(a) : "xm"(b));
122  return a;
123 }
124 NAMESPACE_END
125 #endif // wmmintrin.h
126 #endif // CRYPTOPP_BOOL_AESNI_INTRINSICS_AVAILABLE
127 
128 NAMESPACE_BEGIN(CryptoPP)
129 
130 #if CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
131 
132 #define CRYPTOPP_CPUID_AVAILABLE
133 
134 // these should not be used directly
135 extern CRYPTOPP_DLL bool g_x86DetectionDone;
136 extern CRYPTOPP_DLL bool g_hasMMX;
137 extern CRYPTOPP_DLL bool g_hasISSE;
138 extern CRYPTOPP_DLL bool g_hasSSE2;
139 extern CRYPTOPP_DLL bool g_hasSSSE3;
140 extern CRYPTOPP_DLL bool g_hasSSE4;
141 extern CRYPTOPP_DLL bool g_hasAESNI;
142 extern CRYPTOPP_DLL bool g_hasCLMUL;
143 extern CRYPTOPP_DLL bool g_isP4;
144 extern CRYPTOPP_DLL bool g_hasRDRAND;
145 extern CRYPTOPP_DLL bool g_hasRDSEED;
146 extern CRYPTOPP_DLL bool g_hasPadlockRNG;
147 extern CRYPTOPP_DLL bool g_hasPadlockACE;
148 extern CRYPTOPP_DLL bool g_hasPadlockACE2;
149 extern CRYPTOPP_DLL bool g_hasPadlockPHE;
150 extern CRYPTOPP_DLL bool g_hasPadlockPMM;
151 extern CRYPTOPP_DLL word32 g_cacheLineSize;
152 
153 CRYPTOPP_DLL void CRYPTOPP_API DetectX86Features();
154 CRYPTOPP_DLL bool CRYPTOPP_API CpuId(word32 input, word32 output[4]);
155 
156 inline bool HasMMX()
157 {
158 #if CRYPTOPP_BOOL_X64
159  return true;
160 #else
161  if (!g_x86DetectionDone)
162  DetectX86Features();
163  return g_hasMMX;
164 #endif
165 }
166 
167 inline bool HasISSE()
168 {
169 #if CRYPTOPP_BOOL_X64
170  return true;
171 #else
172  if (!g_x86DetectionDone)
173  DetectX86Features();
174  return g_hasISSE;
175 #endif
176 }
177 
178 inline bool HasSSE2()
179 {
180 #if CRYPTOPP_BOOL_X64
181  return true;
182 #else
183  if (!g_x86DetectionDone)
184  DetectX86Features();
185  return g_hasSSE2;
186 #endif
187 }
188 
189 inline bool HasSSSE3()
190 {
191  if (!g_x86DetectionDone)
192  DetectX86Features();
193  return g_hasSSSE3;
194 }
195 
196 inline bool HasSSE4()
197 {
198  if (!g_x86DetectionDone)
199  DetectX86Features();
200  return g_hasSSE4;
201 }
202 
203 inline bool HasAESNI()
204 {
205  if (!g_x86DetectionDone)
206  DetectX86Features();
207  return g_hasAESNI;
208 }
209 
210 inline bool HasCLMUL()
211 {
212  if (!g_x86DetectionDone)
213  DetectX86Features();
214  return g_hasCLMUL;
215 }
216 
217 inline bool IsP4()
218 {
219  if (!g_x86DetectionDone)
220  DetectX86Features();
221  return g_isP4;
222 }
223 
224 inline bool HasRDRAND()
225 {
226  if (!g_x86DetectionDone)
227  DetectX86Features();
228  return g_hasRDRAND;
229 }
230 
231 inline bool HasRDSEED()
232 {
233  if (!g_x86DetectionDone)
234  DetectX86Features();
235  return g_hasRDSEED;
236 }
237 
238 inline bool HasPadlockRNG()
239 {
240  if (!g_x86DetectionDone)
241  DetectX86Features();
242  return g_hasPadlockRNG;
243 }
244 
245 inline bool HasPadlockACE()
246 {
247  if (!g_x86DetectionDone)
248  DetectX86Features();
249  return g_hasPadlockACE;
250 }
251 
252 inline bool HasPadlockACE2()
253 {
254  if (!g_x86DetectionDone)
255  DetectX86Features();
256  return g_hasPadlockACE2;
257 }
258 
259 inline bool HasPadlockPHE()
260 {
261  if (!g_x86DetectionDone)
262  DetectX86Features();
263  return g_hasPadlockPHE;
264 }
265 
266 inline bool HasPadlockPMM()
267 {
268  if (!g_x86DetectionDone)
269  DetectX86Features();
270  return g_hasPadlockPMM;
271 }
272 
273 inline int GetCacheLineSize()
274 {
275  if (!g_x86DetectionDone)
276  DetectX86Features();
277  return g_cacheLineSize;
278 }
279 
280 #elif (CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARM64)
281 
282 extern bool g_ArmDetectionDone;
283 extern bool g_hasNEON, g_hasCRC32, g_hasAES, g_hasSHA1, g_hasSHA2;
284 void CRYPTOPP_API DetectArmFeatures();
285 
286 //! \brief Determine if an ARM processor has Advanced SIMD available
287 //! \returns true if the hardware is capable of Advanced SIMD at runtime, false otherwise.
288 //! \details Advanced SIMD instructions are available under Aarch64 (ARM-64) and Aarch32 (ARM-32).
289 //! \details Runtime support requires compile time support. When compiling with GCC, you may
290 //! need to compile with <tt>-mfpu=neon</tt> (32-bit) or <tt>-march=armv8-a</tt>
291 //! (64-bit). Also see ARM's <tt>__ARM_NEON</tt> preprocessor macro.
292 inline bool HasNEON()
293 {
294  if (!g_ArmDetectionDone)
295  DetectArmFeatures();
296  return g_hasNEON;
297 }
298 
299 //! \brief Determine if an ARM processor has CRC32 available
300 //! \returns true if the hardware is capable of CRC32 at runtime, false otherwise.
301 //! \details CRC32 instructions provide access to the processor's CRC32 and CRC32-C intructions.
302 //! They are provided by ARM C Language Extensions 2.0 (ACLE 2.0) and available under Aarch64
303 //! (ARM-64) and Aarch32 (ARM-32) running on Aarch64 (i.e., an AArch32 execution environment).
304 //! \details Runtime support requires compile time support. When compiling with GCC, you may
305 //! need to compile with <tt>-march=armv8-a+crc</tt>; while Apple requires
306 //! <tt>-arch arm64</tt>. Also see ARM's <tt>__ARM_FEATURE_CRC32</tt> preprocessor macro.
307 inline bool HasCRC32()
308 {
309  if (!g_ArmDetectionDone)
310  DetectArmFeatures();
311  return g_hasCRC32;
312 }
313 
314 //! \brief Determine if an ARM processor has AES available
315 //! \returns true if the hardware is capable of AES at runtime, false otherwise.
316 //! \details AES is part of the Crypto extensions from ARM C Language Extensions 2.0 (ACLE 2.0)
317 //! and available under Aarch64 (ARM-64) and Aarch32 (ARM-32) running on Aarch64 (i.e., an
318 //! AArch32 execution environment).
319 //! \details Runtime support requires compile time support. When compiling with GCC, you may
320 //! need to compile with <tt>-march=armv8-a+crypto</tt>; while Apple requires
321 //! <tt>-arch arm64</tt>. Also see ARM's <tt>__ARM_FEATURE_CRYPTO</tt> preprocessor macro.
322 inline bool HasAES()
323 {
324  if (!g_ArmDetectionDone)
325  DetectArmFeatures();
326  return g_hasAES;
327 }
328 
329 //! \brief Determine if an ARM processor has SHA1 available
330 //! \returns true if the hardware is capable of SHA1 at runtime, false otherwise.
331 //! \details SHA1 is part of the Crypto extensions from ARM C Language Extensions 2.0 (ACLE 2.0)
332 //! and available under Aarch64 (ARM-64) and Aarch32 (ARM-32) running on Aarch64 (i.e., an
333 //! AArch32 execution environment).
334 //! \details Runtime support requires compile time support. When compiling with GCC, you may
335 //! need to compile with <tt>-march=armv8-a+crypto</tt>; while Apple requires
336 //! <tt>-arch arm64</tt>. Also see ARM's <tt>__ARM_FEATURE_CRYPTO</tt> preprocessor macro.
337 inline bool HasSHA1()
338 {
339  if (!g_ArmDetectionDone)
340  DetectArmFeatures();
341  return g_hasSHA1;
342 }
343 
344 //! \brief Determine if an ARM processor has SHA2 available
345 //! \returns true if the hardware is capable of SHA2 at runtime, false otherwise.
346 //! \details SHA2 is part of the Crypto extensions from ARM C Language Extensions 2.0 (ACLE 2.0)
347 //! and available under Aarch64 (ARM-64) and Aarch32 (ARM-32) running on Aarch64 (i.e., an
348 //! AArch32 execution environment).
349 //! \details Runtime support requires compile time support. When compiling with GCC, you may
350 //! need to compile with <tt>-march=armv8-a+crypto</tt>; while Apple requires
351 //! <tt>-arch arm64</tt>. Also see ARM's <tt>__ARM_FEATURE_CRYPTO</tt> preprocessor macro.
352 inline bool HasSHA2()
353 {
354  if (!g_ArmDetectionDone)
355  DetectArmFeatures();
356  return g_hasSHA2;
357 }
358 
359 //! \brief Provides the cache line size at runtime
360 //! \returns true if the hardware is capable of CRC32 at runtime, false otherwise.
361 //! \details GetCacheLineSize() provides is an estimate using CRYPTOPP_L1_CACHE_LINE_SIZE.
362 //! The runtime instructions to query the processor are privileged.
363 inline int GetCacheLineSize()
364 {
365  return CRYPTOPP_L1_CACHE_LINE_SIZE;
366 }
367 
368 #else
369 
370 inline int GetCacheLineSize()
371 {
372  return CRYPTOPP_L1_CACHE_LINE_SIZE;
373 }
374 
375 #endif // X86/X32/X64 and ARM
376 
377 #endif
378 
379 #if CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
380 
381 #ifdef CRYPTOPP_GENERATE_X64_MASM
382  #define AS1(x) x*newline*
383  #define AS2(x, y) x, y*newline*
384  #define AS3(x, y, z) x, y, z*newline*
385  #define ASS(x, y, a, b, c, d) x, y, a*64+b*16+c*4+d*newline*
386  #define ASL(x) label##x:*newline*
387  #define ASJ(x, y, z) x label##y*newline*
388  #define ASC(x, y) x label##y*newline*
389  #define AS_HEX(y) 0##y##h
390 #elif defined(_MSC_VER) || defined(__BORLANDC__)
391  #define CRYPTOPP_MS_STYLE_INLINE_ASSEMBLY
392  #define AS1(x) __asm {x}
393  #define AS2(x, y) __asm {x, y}
394  #define AS3(x, y, z) __asm {x, y, z}
395  #define ASS(x, y, a, b, c, d) __asm {x, y, (a)*64+(b)*16+(c)*4+(d)}
396  #define ASL(x) __asm {label##x:}
397  #define ASJ(x, y, z) __asm {x label##y}
398  #define ASC(x, y) __asm {x label##y}
399  #define CRYPTOPP_NAKED __declspec(naked)
400  #define AS_HEX(y) 0x##y
401 #else
402  #define CRYPTOPP_GNU_STYLE_INLINE_ASSEMBLY
403 
404 #if defined(CRYPTOPP_CLANG_VERSION) || defined(CRYPTOPP_APPLE_CLANG_VERSION)
405  #define NEW_LINE "\n"
406  #define INTEL_PREFIX ".intel_syntax;"
407  #define INTEL_NOPREFIX ".intel_syntax;"
408  #define ATT_PREFIX ".att_syntax;"
409  #define ATT_NOPREFIX ".att_syntax;"
410 #else
411  #define NEW_LINE
412  #define INTEL_PREFIX ".intel_syntax prefix;"
413  #define INTEL_NOPREFIX ".intel_syntax noprefix;"
414  #define ATT_PREFIX ".att_syntax prefix;"
415  #define ATT_NOPREFIX ".att_syntax noprefix;"
416 #endif
417 
418  // define these in two steps to allow arguments to be expanded
419  #define GNU_AS1(x) #x ";" NEW_LINE
420  #define GNU_AS2(x, y) #x ", " #y ";" NEW_LINE
421  #define GNU_AS3(x, y, z) #x ", " #y ", " #z ";" NEW_LINE
422  #define GNU_ASL(x) "\n" #x ":" NEW_LINE
423  #define GNU_ASJ(x, y, z) #x " " #y #z ";" NEW_LINE
424  #define AS1(x) GNU_AS1(x)
425  #define AS2(x, y) GNU_AS2(x, y)
426  #define AS3(x, y, z) GNU_AS3(x, y, z)
427  #define ASS(x, y, a, b, c, d) #x ", " #y ", " #a "*64+" #b "*16+" #c "*4+" #d ";"
428  #define ASL(x) GNU_ASL(x)
429  #define ASJ(x, y, z) GNU_ASJ(x, y, z)
430  #define ASC(x, y) #x " " #y ";"
431  #define CRYPTOPP_NAKED
432  #define AS_HEX(y) 0x##y
433 #endif
434 
435 #define IF0(y)
436 #define IF1(y) y
437 
438 // Should be confined to GCC, but its used to help manage Clang 3.4 compiler error.
439 // Also see LLVM Bug 24232, http://llvm.org/bugs/show_bug.cgi?id=24232 .
440 #ifndef INTEL_PREFIX
441  #define INTEL_PREFIX
442 #endif
443 #ifndef INTEL_NOPREFIX
444  #define INTEL_NOPREFIX
445 #endif
446 #ifndef ATT_PREFIX
447  #define ATT_PREFIX
448 #endif
449 #ifndef ATT_NOPREFIX
450  #define ATT_NOPREFIX
451 #endif
452 
453 #ifdef CRYPTOPP_GENERATE_X64_MASM
454 #define ASM_MOD(x, y) ((x) MOD (y))
455 #define XMMWORD_PTR XMMWORD PTR
456 #else
457 // GNU assembler doesn't seem to have mod operator
458 #define ASM_MOD(x, y) ((x)-((x)/(y))*(y))
459 // GAS 2.15 doesn't support XMMWORD PTR. it seems necessary only for MASM
460 #define XMMWORD_PTR
461 #endif
462 
463 #if CRYPTOPP_BOOL_X86
464  #define AS_REG_1 ecx
465  #define AS_REG_2 edx
466  #define AS_REG_3 esi
467  #define AS_REG_4 edi
468  #define AS_REG_5 eax
469  #define AS_REG_6 ebx
470  #define AS_REG_7 ebp
471  #define AS_REG_1d ecx
472  #define AS_REG_2d edx
473  #define AS_REG_3d esi
474  #define AS_REG_4d edi
475  #define AS_REG_5d eax
476  #define AS_REG_6d ebx
477  #define AS_REG_7d ebp
478  #define WORD_SZ 4
479  #define WORD_REG(x) e##x
480  #define WORD_PTR DWORD PTR
481  #define AS_PUSH_IF86(x) AS1(push e##x)
482  #define AS_POP_IF86(x) AS1(pop e##x)
483  #define AS_JCXZ jecxz
484 #elif CRYPTOPP_BOOL_X32
485  #define AS_REG_1 ecx
486  #define AS_REG_2 edx
487  #define AS_REG_3 r8d
488  #define AS_REG_4 r9d
489  #define AS_REG_5 eax
490  #define AS_REG_6 r10d
491  #define AS_REG_7 r11d
492  #define AS_REG_1d ecx
493  #define AS_REG_2d edx
494  #define AS_REG_3d r8d
495  #define AS_REG_4d r9d
496  #define AS_REG_5d eax
497  #define AS_REG_6d r10d
498  #define AS_REG_7d r11d
499  #define WORD_SZ 4
500  #define WORD_REG(x) e##x
501  #define WORD_PTR DWORD PTR
502  #define AS_PUSH_IF86(x) AS1(push r##x)
503  #define AS_POP_IF86(x) AS1(pop r##x)
504  #define AS_JCXZ jecxz
505 #elif CRYPTOPP_BOOL_X64
506  #ifdef CRYPTOPP_GENERATE_X64_MASM
507  #define AS_REG_1 rcx
508  #define AS_REG_2 rdx
509  #define AS_REG_3 r8
510  #define AS_REG_4 r9
511  #define AS_REG_5 rax
512  #define AS_REG_6 r10
513  #define AS_REG_7 r11
514  #define AS_REG_1d ecx
515  #define AS_REG_2d edx
516  #define AS_REG_3d r8d
517  #define AS_REG_4d r9d
518  #define AS_REG_5d eax
519  #define AS_REG_6d r10d
520  #define AS_REG_7d r11d
521  #else
522  #define AS_REG_1 rdi
523  #define AS_REG_2 rsi
524  #define AS_REG_3 rdx
525  #define AS_REG_4 rcx
526  #define AS_REG_5 r8
527  #define AS_REG_6 r9
528  #define AS_REG_7 r10
529  #define AS_REG_1d edi
530  #define AS_REG_2d esi
531  #define AS_REG_3d edx
532  #define AS_REG_4d ecx
533  #define AS_REG_5d r8d
534  #define AS_REG_6d r9d
535  #define AS_REG_7d r10d
536  #endif
537  #define WORD_SZ 8
538  #define WORD_REG(x) r##x
539  #define WORD_PTR QWORD PTR
540  #define AS_PUSH_IF86(x)
541  #define AS_POP_IF86(x)
542  #define AS_JCXZ jrcxz
543 #endif
544 
545 // helper macro for stream cipher output
546 #define AS_XMM_OUTPUT4(labelPrefix, inputPtr, outputPtr, x0, x1, x2, x3, t, p0, p1, p2, p3, increment)\
547  AS2( test inputPtr, inputPtr)\
548  ASC( jz, labelPrefix##3)\
549  AS2( test inputPtr, 15)\
550  ASC( jnz, labelPrefix##7)\
551  AS2( pxor xmm##x0, [inputPtr+p0*16])\
552  AS2( pxor xmm##x1, [inputPtr+p1*16])\
553  AS2( pxor xmm##x2, [inputPtr+p2*16])\
554  AS2( pxor xmm##x3, [inputPtr+p3*16])\
555  AS2( add inputPtr, increment*16)\
556  ASC( jmp, labelPrefix##3)\
557  ASL(labelPrefix##7)\
558  AS2( movdqu xmm##t, [inputPtr+p0*16])\
559  AS2( pxor xmm##x0, xmm##t)\
560  AS2( movdqu xmm##t, [inputPtr+p1*16])\
561  AS2( pxor xmm##x1, xmm##t)\
562  AS2( movdqu xmm##t, [inputPtr+p2*16])\
563  AS2( pxor xmm##x2, xmm##t)\
564  AS2( movdqu xmm##t, [inputPtr+p3*16])\
565  AS2( pxor xmm##x3, xmm##t)\
566  AS2( add inputPtr, increment*16)\
567  ASL(labelPrefix##3)\
568  AS2( test outputPtr, 15)\
569  ASC( jnz, labelPrefix##8)\
570  AS2( movdqa [outputPtr+p0*16], xmm##x0)\
571  AS2( movdqa [outputPtr+p1*16], xmm##x1)\
572  AS2( movdqa [outputPtr+p2*16], xmm##x2)\
573  AS2( movdqa [outputPtr+p3*16], xmm##x3)\
574  ASC( jmp, labelPrefix##9)\
575  ASL(labelPrefix##8)\
576  AS2( movdqu [outputPtr+p0*16], xmm##x0)\
577  AS2( movdqu [outputPtr+p1*16], xmm##x1)\
578  AS2( movdqu [outputPtr+p2*16], xmm##x2)\
579  AS2( movdqu [outputPtr+p3*16], xmm##x3)\
580  ASL(labelPrefix##9)\
581  AS2( add outputPtr, increment*16)
582 
583 #endif // X86/X32/X64
584 
585 NAMESPACE_END
586 
587 #endif // CRYPTOPP_CPU_H
Library configuration file.
int GetCacheLineSize()
and AArch64 code paths for NEON.
Definition: cpu.h:370
Crypto++ library namespace.